ASML and its partners had to overcome many challenges in order to make EUV lithography a reality.
For instance, in a previous video I talked about the EUV light source and its double-shot technique. But while challenging, that had not been considered one of EUV's dealbreaking issues.
A greater struggle was how to achieve a zero defect rate for the EUV photomask, or reticle. I will use the two terms interchangeably here.
The EUV reticle contains the chip design. Any defects on the reticle larger than a certain size will show up on the printed wafers themselves. So in order for it to work, it must be truly perfect.
In this video, we look at how ASML managed to overcome this ultra-critical aspect of the technology.
Links:
- The Asianometry Newsletter: https://asianometry.substack.com
- Patreon: https://www.patreon.com/Asianometry
- The Podcast: https://anchor.fm/asianometry
- Twitter: https://twitter.com/asianometry
For instance, in a previous video I talked about the EUV light source and its double-shot technique. But while challenging, that had not been considered one of EUV's dealbreaking issues.
A greater struggle was how to achieve a zero defect rate for the EUV photomask, or reticle. I will use the two terms interchangeably here.
The EUV reticle contains the chip design. Any defects on the reticle larger than a certain size will show up on the printed wafers themselves. So in order for it to work, it must be truly perfect.
In this video, we look at how ASML managed to overcome this ultra-critical aspect of the technology.
Links:
- The Asianometry Newsletter: https://asianometry.substack.com
- Patreon: https://www.patreon.com/Asianometry
- The Podcast: https://anchor.fm/asianometry
- Twitter: https://twitter.com/asianometry
